Efficient Digital Waveform Compression Method for Logic Simulation of Integrated Circuits

Circuit simulation becomes more and important in integrated circuit design. For VLSI circuits, the usually outputs signal waveforms occupying massive storage space. The compression of these crucial to efficiency simulation. Logic mainly values at time transition some auxiliary information such as name, type, width. A method for is proposed. Then, name scheme existing work improved according characteristics value data, a efficient digital waveform format proposed adaptive variable-length coding compression. At same time, general algorithms can be used secondary compression, thereby further improve rate. Finally, through parallel computing, decompression procedure run three-stage pipeline mode. largely reduces better within logic simulator. experimental results show that with rate large 720. Compared methods, increased by nearly 23 times shorter time.